1. Field of the Invention
The present invention relates to field-effect transistors (FETs) such as high-electron-mobility transistors (HEMTs). The present invention particularly relates to a field-effect transistor, manufactured by crystal growth, containing group-III element nitride semiconductors.
2. Description of the Related Art
Conventional field-effect transistors include channel layers and semiconductor crystal layers, such as carrier supply layers or barrier layers, containing a semiconductor represented by the formula AlxGa1-xN. In order to allow the barrier height between each semiconductor crystal layer and channel layer to be high, x in the formula AlxGa1-xN usually ranges from 0.20 to 0.30. This allows the field-effect transistors to have low on-resistance.
Japanese Unexamined Patent Application Publication Nos. 2000-277536 and 2005-183551 (hereinafter referred to as Patent Documents 1 and 2, respectively) disclose techniques for reducing the leakage currents flowing in the field-effect transistors.
Since the field-effect transistors include the semiconductor crystal layers containing such a semiconductor, the field-effect transistors cannot have high dielectric strength although the field-effect transistors have low on-resistance. This is probably because an increase in x in the formula AlxGa1-xN deteriorates the crystallinity of the semiconductor crystal layers and therefore leakage paths through which gate leakage currents flow are formed by the application of high voltages to the field-effect transistors.
In the conventional techniques disclosed in Patent Documents 1 and 2, although the leakage currents can be reduced, additional components such as cap layers need to be used. This causes the structures of the field-effect transistors and processes for manufacturing the field-effect transistors to be complicated. Therefore, the conventional techniques are not necessarily advantageous in efficiently manufacturing the field-effect transistors.